↓ Skip to main content
What is this page? Embed badge

VLSI-SoC: System-on-Chip in the Nanoscale Era – Design, Verification and Reliability

Overview of attention for book
Cover of 'VLSI-SoC: System-on-Chip in the Nanoscale Era – Design, Verification and Reliability'

Table of Contents

  1. Altmetric Badge
    Book Overview
  2. Altmetric Badge
    Chapter 1 Enabling Internet-of-Things with Opportunities Brought by Emerging Devices, Circuits and Architectures
  3. Altmetric Badge
    Chapter 2 Logic with Unipolar Memristors – Circuits and Design Methodology
  4. Altmetric Badge
    Chapter 3 Robust Hybrid TFET-MOSFET Circuits in Presence of Process Variations and Soft Errors
  5. Altmetric Badge
    Chapter 4 Logic Synthesis for Silicon and Beyond-Silicon Multi-gate Pass-Logic Circuits
  6. Altmetric Badge
    Chapter 5 Digital Hardware Design Based on Metamodels and Model Transformations
  7. Altmetric Badge
    Chapter 6 Improving the Efficiency of Formal Verification: The Case of Clock-Domain Crossings
  8. Altmetric Badge
    Chapter 7 Improving Stress Quality for SoC Using Faster-than-At-Speed Execution of Functional Programs
  9. Altmetric Badge
    Chapter 8 Beyond Ideal DVFS Through Ultra-Fine Grain Vdd-Hopping
  10. Altmetric Badge
    Chapter 9 Earth Mover’s Distance as a Comparison Metric for Analog Behavior
  11. Altmetric Badge
    Chapter 10 Approximate Matrix Inversion for Linear Pre-coders in Massive MIMO
  12. Altmetric Badge
    Chapter 11 A Novel Hardware-Oriented Stereo Matching Algorithm and Its Architecture Design in FPGA
Attention for Chapter 3: Robust Hybrid TFET-MOSFET Circuits in Presence of Process Variations and Soft Errors
Altmetric Badge

Mentioned by

news
1 news outlet

Citations

dimensions_citation
2 Dimensions
Summary News Dimensions citations
So far, Altmetric has seen 1 news story.

This page shows the most recent news stories that mention this research output.

Click here to find out how to access more activity.

This page is provided by Altmetric.