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Chapter title |
Performance Modelling and Dynamic Scheduling on Heterogeneous-ISA Multi-core Architectures
|
---|---|
Chapter number | 58 |
Book title |
VLSI Design and Test
|
Published by |
Springer, Singapore, July 2019
|
DOI | 10.1007/978-981-32-9767-8_58 |
Book ISBNs |
978-9-81-329766-1, 978-9-81-329767-8
|
Authors |
Nirmal Kumar Boran, Dinesh Kumar Yadav, Rishabh Iyer, Boran, Nirmal Kumar, Yadav, Dinesh Kumar, Iyer, Rishabh |