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Zephyr: A Static Timing Analyzer Integrated in a Trans-hierarchical Refinement Design Flow
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation
Springer, Berlin, Heidelberg, September 2006
Christophe Alexandre, Marek Sroka, Hugo Clément, Christian Masson
The data shown below were compiled from readership statistics for 2 Mendeley readers of this research output. Click here to see the associated Mendeley record.
|Readers by professional status||Count||As %|
|Student > Master||1||50%|
|Readers by discipline||Count||As %|