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Power Modeling of Precharged Address Bus and Application to Multi-bit DPA Attacks to DES Algorithm
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation
Springer, Berlin, Heidelberg, September 2006
M. Alioto, M. Poli, S. Rocchi, V. Vignoli
The data shown below were compiled from readership statistics for 2 Mendeley readers of this research output. Click here to see the associated Mendeley record.
|Readers by professional status||Count||As %|
|Student > Doctoral Student||1||50%|
|Readers by discipline||Count||As %|
|Medicine and Dentistry||1||50%|